Use

Select the pin muxes of the BeagleBone Black you want to use by clicking on a cell. There are checkboxes on the right for reading and pull settings.
Copy the generated text to .dts
Then, compile the file using
dtc -O dtb -o /lib/firmware/BB-BONE-MYTEST-00A0.dtbo -b 0 -@ BB-BONE-MYTEST-00A0.dts
Finally, activate the overlay with
echo BB-BONE-MYTEST > /sys/devices/bone_capemgr.*/slots

Output

Muxing table

Physical pinPin NameMode7Mode6Mode5Mode4Mode3Mode2Mode1Mode0Alt. NameExport No.AddressGPIO No.slewReceivePull-upDisable Pull
P8.01DGND
P8.02DGND
P8.03GPIO1_6gpio1[6]mmc1_dat6gpmc_ad6R960x818/01838
P8.04GPIO1_7gpio1[7]mmc1_dat7gpmc_ad7T970x81c/01c39
P8.05GPIO1_2gpio1[2]mmc1_dat2gpmc_ad2R820x808/00834
P8.06GPIO1_3gpio1[3]mmc1_dat3gpmc_ad3T830x80c/00c35
P8.07TIMER4gpio2[2]timer4gpmc_advn_aleR7360x890/09066
P8.08TIMER7gpio2[3]timer7gpmc_oen_renT7370x894/09467
P8.09TIMER5gpio2[5]timer5gpmc_be0n_cleT6390x89c/09c69
P8.10TIMER6gpio2[4]timer6gpmc_wenU6380x898/09868
P8.11GPIO1_13gpio1[13]pr1_pru0_pru_r30_15eQEP2B_inmmc2_dat1mmc1_dat5lcd_data18gpmc_ad13R12130x834/03445
P8.12GPIO1_12gpio1[12]pr1_pru0_pru_r30_14EQEP2A_INMMC2_DAT0MMC1_DAT4LCD_DATA19GPMC_AD12T12120x830/03044
P8.13EHRPWM2Bgpio0[23]ehrpwm2Bmmc2_dat5mmc1_dat1lcd_data22gpmc_ad9T1090x824/02423
P8.14GPIO0_26gpio0[26]ehrpwm2_tripzone_inmmc2_dat6mmc1_dat2lcd_data21gpmc_ad10T11100x828/02826
P8.15GPIO1_15gpio1[15]pr1_pru0_pru_r31_15eQEP2_strobemmc2_dat3mmc1_dat7lcd_data16gpmc_ad15U13150x83c/03c47
P8.16GPIO1_14gpio1[14]pr1_pru0_pru_r31_14eQEP2_indexmmc2_dat2mmc1_dat6lcd_data17gpmc_ad14V13140x838/03846
P8.17GPIO0_27gpio0[27]ehrpwm0_syncommc2_dat7mmc1_dat3lcd_data20gpmc_ad11U12110x82c/02c27
P8.18GPIO2_1gpio2[1]mcasp0_fsrmmc2_clkgpmc_wait1lcd_memory_clkgpmc_clk_mux0V12350x88c/08c65
P8.19EHRPWM2Agpio0[22]ehrpwm2Ammc2_dat4mmc1_dat0lcd_data23gpmc_ad8U1080x820/02022
P8.20GPIO1_31gpio1[31]pr1_pru1_pru_r31_13pr1_pru1_pru_r30_13mmc1_cmdgpmc_be1ngpmc_csn2V9330x884/08463
P8.21GPIO1_30gpio1[30]pr1_pru1_pru_r31_12pr1_pru1_pru_r30_12mmc1_clkgpmc_clkgpmc_csn1U9320x880/08062
P8.22GPIO1_5gpio1[5]mmc1_dat5gpmc_ad5V850x814/01437
P8.23GPIO1_4gpio1[4]mmc1_dat4gpmc_ad4U840x810/01036
P8.24GPIO1_1gpio1[1]mmc1_dat1gpmc_ad1V710x804/00433
P8.25GPIO1_0gpio1[0]mmc1_dat0gpmc_ad0U700x800/00032
P8.26GPIO1_29gpio1[29]gpmc_csn0V6310x87c/07c61
P8.27GPIO2_22gpio2[22]pr1_pru1_pru_r31_8pr1_pru1_pru_r30_8gpmc_a8lcd_vsyncU5560x8e0/0e086
P8.28GPIO2_24gpio2[24]pr1_pru1_pru_r31_10pr1_pru1_pru_r30_10gpmc_a10lcd_pclkV5580x8e8/0e888
P8.29GPIO2_23gpio2[23]pr1_pru1_pru_r31_9pr1_pru1_pru_r30_9gpmc_a9lcd_hsyncR5570x8e4/0e487
P8.30GPIO2_25gpio2[25]gpmc_a11lcd_ac_bias_enR6590x8ec/0ec89
P8.31UART5_CTSNgpio0[10]uart5_ctsnuart5_rxdmcasp0_axr1eQEP1_indexgpmc_a18lcd_data14V4540x8d8/0d810
P8.32UART5_RTSNgpio0[11]uart5_rtsnmcasp0_axr3mcasp0_ahclkxeQEP1_strobegpmc_a19lcd_data15T5550x8dc/0dc11
P8.33UART4_RTSNgpio0[9]uart4_rtsnmcasp0_axr3mcasp0_fsreQEP1B_ingpmc_a17lcd_data13V3530x8d4/0d49
P8.34UART3_RTSNgpio2[17]uart3_rtsnmcasp0_axr2mcasp0_ahclkrehrpwm1Bgpmc_a15lcd_data11U4510x8cc/0cc81
P8.35UART4_CTSNgpio0[8]uart4_ctsnmcasp0_axr2mcasp0_aclkreQEP1A_ingpmc_a16lcd_data12V2520x8d0/0d08
P8.36UART3_CTSNgpio2[16]uart3_ctsnmcasp0_axr0ehrpwm1Agpmc_a14lcd_data10U3500x8c8/0c880
P8.37UART5_TXDgpio2[14]uart2_ctsnuart5_txdmcasp0_aclkxehrpwm1_tripzone_ingpmc_a12lcd_data8U1480x8c0/0c078
P8.38UART5_RXDgpio2[15]uart2_rtsnuart5_rxdmcasp0_fsxehrpwm0_syncogpmc_a13lcd_data9U2490x8c4/0c479
P8.39GPIO2_12gpio2[12]pr1_pru1_pru_r31_6pr1_pru1_pru_r30_6eQEP2_indexgpmc_a6lcd_data6T3460x8b8/0b876
P8.40GPIO2_13gpio2[13]pr1_pru1_pru_r31_7pr1_pru1_pru_r30_7pr1_edio_data_out7eQEP2_strobegpmc_a7lcd_data7T4470x8bc/0bc77
P8.41GPIO2_10gpio2[10]pr1_pru1_pru_r31_4pr1_pru1_pru_r30_4eQEP2A_ingpmc_a4lcd_data4T1440x8b0/0b074
P8.42GPIO2_11gpio2[11]pr1_pru1_pru_r31_5pr1_pru1_pru_r30_5eQEP2B_ingpmc_a5lcd_data5T2450x8b4/0b475
P8.43GPIO2_8gpio2[8]pr1_pru1_pru_r31_2pr1_pru1_pru_r30_2ehrpwm2_tripzone_ingpmc_a2lcd_data2R3420x8a8/0a872
P8.44GPIO2_9gpio2[9]pr1_pru1_pru_r31_3pr1_pru1_pru_r30_3ehrpwm0_syncogpmc_a3lcd_data3R4430x8ac/0ac73
P8.45GPIO2_6gpio2[6]pr1_pru1_pru_r31_0pr1_pru1_pru_r30_0ehrpwm2Agpmc_a0lcd_data0R1400x8a0/0a070
P8.46GPIO2_7gpio2[7]pr1_pru1_pru_r31_1pr1_pru1_pru_r30_1ehrpwm2Bgpmc_a1lcd_data1R2410x8a4/0a471
P9.01GND
P9.02GND
P9.03DC_3.3V
P9.04DC_3.3V
P9.05VDD_5V
P9.06VDD_5V
P9.07SYS_5V
P9.08SYS_5V
P9.09PWR_BUT
P9.10SYS_RESETRESET_OUTA10
P9.11UART4_RXDgpio0[30]uart4_rxd_mux2mmc1_sdcdrmii2_crs_dvgpmc_csn4mii2_crsgpmc_wait0T17280x870/07030
P9.12GPIO1_28gpio1[28]mcasp0_aclkr_mux3gpmc_dirmmc2_dat3gpmc_csn6mii2_colgpmc_be1nU18300x878/07860
P9.13UART4_TXDgpio0[31]uart4_txd_mux2mmc2_sdcdrmii2_rxerrgpmc_csn5mii2_rxerrgpmc_wpnU17290x874/07431
P9.14EHRPWM1Agpio1[18]ehrpwm1A_mux1gpmc_a18mmc2_dat1rgmii2_td3mii2_txd3gpmc_a2U14180x848/04850
P9.15GPIO1_16gpio1[16]ehrpwm1_tripzone_inputgpmc_a16mii2_txenrmii2_tctlgmii2_txengpmc_a0R13160x840/04048
P9.16EHRPWM1Bgpio1[19]ehrpwm1B_mux1gpmc_a19mmc2_dat2rgmii2_td2mii2_txd2gpmc_a3T14190x84c/04c51
P9.17I2C1_SCLgpio0[5]pr1_uart0_txdehrpwm0_synciI2C1_SCLmmc2_sdwpspi0_cs0A16870x95c/15c5
P9.18I2C1_SDAgpio0[4]pr1_uart0_rxdehrpwm0_tripzoneI2C1_SDAmmc1_sdwpspi0_d1B16860x958/1584
P9.19I2C2_SCLgpio0[13]pr1_uart0_rts_nspi1_cs1I2C2_SCLdcan0_rxtimer5uart1_rtsnD17950x97c/17c13
P9.20I2C2_SDAgpio0[12]pr1_uart0_cts_nspi1_cs0I2C2_SDAdcan0_txtimer6uart1_ctsnD18940x978/17812
P9.21UART2_TXDgpio0[3]EMU3_mux1pr1_uart0_rts_nehrpwm0BI2C2_SCLuart2_txdspi0_d0B17850x954/1543
P9.22UART2_RXDgpio0[2]EMU2_mux1pr1_uart0_cts_nehrpwm0AI2C2_SDAuart2_rxdspi0_sclkA17840x950/1502
P9.23GPIO1_17gpio1[17]ehrpwm0_syncogpmc_a17mmc2_dat0rgmii2_rxdvgmii2_rxdvgpmc_a1V14170x844/04449
P9.24UART1_TXDgpio0[15]pr1_pru0_pru_r31_16pr1_uart0_txdI2C1_SCLdcan1_rxmmc2_sdwpuart1_txdD15970x984/18415
P9.25GPIO3_21gpio3[21]pr1_pru0_pru_r31_7pr1_pru0_pru_r30_7EMU4_mux2mcasp1_axr1mcasp0_axr3eQEP0_strobemcasp0_ahclkxA141070x9ac/1ac117
P9.26UART1_RXDgpio0[14]pr1_pru1_pru_r31_16pr1_uart0_rxdI2C1_SDAdcan1_txmmc1_sdwpuart1_rxdD16960x980/18014
P9.27GPIO3_19gpio3[19]pr1_pru0_pru_r31_5pr1_pru0_pru_r30_5EMU2_mux2mcasp1_fsxmcasp0_axr3eQEP0B_inmcasp0_fsrC131050x9a4/1a4115
P9.28SPI1_CS0gpio3[17]pr1_pru0_pru_r31_3pr1_pru0_pru_r30_3eCAP2_in_PWM2_outspi1_cs0mcasp0_axr2ehrpwm0_syncimcasp0_ahclkrC121030x99c/19c113
P9.29SPI1_D0gpio3[15]pr1_pru0_pru_r31_1pr1_pru0_pru_r30_1mmc1_sdcd_mux1spi1_d0ehrpwm0Bmcasp0_fsxB131010x994/194111
P9.30SPI1_D1gpio3[16]pr1_pru0_pru_r31_2pr1_pru0_pru_r30_2mmc2_sdcd_mux1spi1_d1ehrpwm0_tripzonemcasp0_axr0D121020x998/198112
P9.31SPI1_SCLKgpio3[14]pr1_pru0_pru_r31_0pr1_pru0_pru_r30_0mmc0_sdcd_mux1spi1_sclkehrpwm0Amcasp0_aclkxA131000x990/190110
P9.32VADC
P9.33AIN4C8
P9.34AGND
P9.35AIN6A8
P9.36AIN5B8
P9.37AIN2B7
P9.38AIN3A7
P9.39AIN0B6
P9.40AIN1C7
P9.41ACLKOUT2gpio0[20]EMU3_mux0pr1_pru0_pru_r31_16timer7_mux1clkout2tclkinxdma_event_intr1D141090x9b4/1b420
P9.41BGPIO3_20gpio3[20]pr1_pru0_pru_r31_6pr1_pru0_pru_r30_6emu3Mcasp1_axr0eQEP0_indexmcasp0_axr1D130x9a8/1a8116
P9.42AGPIO0_7gpio0[7]xdma_event_intr2mmc0_sdwpspi1_sclkpr1_ecap0_ecap_capin_apwm_ospi1_cs1uart3_txdeCAP0_in_PWM0_outC18890x964/1647
P9.42BGPIO3_18gpio3[18]pr1_pru0_pru_r31_4pr1_pru0_pru_r30_4Mcasp1_aclkxMcaspo_axr2eQEP0A_inMcasp0_aclkrB120x9a0/1a0114
P9.43GND
P9.44GND
P9.45GND
P9.46GND

About

Pin info by Derek Molloy.
Interactivity by Flumble.